文章摘要
肖晗,原魁,何文浩,柴晓杰.基于FPGA的SIFT特征点检测[J].高技术通讯(中文),2012,22(4):429~435
基于FPGA的SIFT特征点检测
SIFT keypoints detection based on FPGA
  修订日期:2010-11-29
DOI:
中文关键词: 尺度不变特征转换(SIFT), 现场可编程门阵列(FPGA), 特征点检测, 机器视觉, 硬件计算
英文关键词: scale invariant feature transform (SIFT), field programmable gate array (FPGA), keypoint detection, machine vision, hardware
基金项目:863计划(2008AA040204, 2008AA040209, 2009AA043902 2)和国家自然科学基金(60875051)资助项目
作者单位
肖晗 中国科学院自动化研究所 
原魁 中国科学院自动化研究所 
何文浩 中国科学院自动化研究所 
柴晓杰 中国科学院自动化研究所 
摘要点击次数: 3105
全文下载次数: 2295
中文摘要:
      为了在现场可编程门阵列(FPGA)中用硬件电路实现尺度不变特征转换(SIFT)特征点的实时检测,对原算法进行了改进,提出了一种基于面密度插值法和双重极值点约束的新方法。该方法显著提升了SIFT特征点的尺度不变性,同时有利于提高定点数的计算精度。在此基础上,设计了一种高效率的硬件计算方案,将所有的计算步骤都实现在了流水线结构中,并在FPGA上完成了开发工作。与现有研究成果相比,这种高效的方案非常节约硬件资源,大大降低了硬件成本,同时又大幅度提高了计算精度。系统能够在采集图像的同时完成特征点的检测。对于360×288大小的图像,其理论最高处理能力为303帧/秒;由于受到摄像头的图像采集速度限制,目前的实际处理速度是25帧/秒。
英文摘要:
      In order to achieve real time detection of scale invariant feature transform (SIFT) keypoints via hardware circuits in field programmable gate array (FPGA), the original algorithm was ameliorated and a new method based on area density interpolation and dual extremum restriction was proposed, which can greatly enhance the scale invariance of SIFT keypoints while benefiting the computation accuracy of fixed point numbers. After that, a highly efficient hardware computation scheme was designed and implemented in a FPGA chip with all the computational procedures arranged in a pipelined structure. Compared with existing research achievements, the above mentioned scheme needs much less hardware resources, resulting in the great reduction of hardware costs and the great improvement of computation accuracy. The system can perform image acquisition and keypoint detection at the same time. For an image size of 360×288, its theoretical maximum throughput can reach 303 fps (frames per second), while its current actual processing rate is 25 fps because it is limited by the speed of the camera.
查看全文   查看/发表评论  下载PDF阅读器
关闭

分享按钮