| 周鹤,冯军.低功耗 0.18μm 10Gb/s CMOS 16∶1复接器[J].高技术通讯(中文),2010,20(4):410~414 |
| 低功耗 0.18μm 10Gb/s CMOS 16∶1复接器 |
| A low power 0.18μm 10Gb/s CMOS 16:1 multiplexer |
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| DOI： |
| 中文关键词: CMOS，复接器，低功耗，超高速，光纤通信 |
| 英文关键词: CMOS, multiplexer, low power, ultra high speed, optical communication |
| 基金项目:863计划(2006AA01Z284)资助项目 |
| 作者 | 单位 | | 周鹤 | 东南大学射频与光电集成电路研究所 | | 冯军 | 东南大学射频与光电集成电路研究所 |
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| 中文摘要: |
| 采用中芯国际(SMIC)018μm互补金属氧化物半导体(CMOS)工艺实现了功耗为160mW、速率为10Gb/s的16:1复接器。该复接器采用可以分级优化的树型结构。低速(622Mb/s→5Gb/s)复接和低速(25GHz→622MHz)分频单元采用CMOS逻辑电路实现，高速(5Gb/s→10Gb/s)复接和高速(5GHz→25GHz)分频单元采用源极耦合场效应管逻辑(SCFL)电路实现。测试结果表明，在18V的工作电压下，芯片可以稳定工作在10Gb/s的速率上，输出信号逻辑正确，眼图良好，单端峰 |
| 英文摘要: |
| A 10Gb/s 16:1 multiplexer was fabricated using the semiconductor manufacturing international corporation (SMIC) 0.18μm complementary metal oxide semiconductor (CMOS) process. The total power consumption of the chip is 160mW. The tree type structure is adopted. The low speed (622Mb/s→5Gb/s) multiplexer cell and the low speed (25GHz→622MHz) frequency divider cell were implemented using the COMS logic, while the high speed (5Gb/s→10Gb/s) multiplexer cell and the high speed (5GHz→2.5GHz) frequency divider cell were implemented using the source coupled field effect transistor logic (SCFL). The test results of the 16:1 multiplexer show that its output data rate is up to 10Gb/s at a supply voltage of 1.8V, and the peak to peak value of output single signal is 180mV. |
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