| Lan Huiying(兰慧盈),Wu Linyang,Han Dong,Du Zidong.[J].高技术通讯(英文),2019,25(4):386~394 |
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| Assembly language and assembler for deep learning accelerators |
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| DOI：doi：10.3772/j.issn.1006-6748.2019.04.006 |
| 中文关键词: |
| 英文关键词: deep learning, deep learning accelerator (DLA), assembly language, programming language |
| 基金项目: |
| Author Name | Affiliation | | Lan Huiying(兰慧盈) | | | Wu Linyang | | | Han Dong | | | Du Zidong | |
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| 中文摘要: |
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| 英文摘要: |
| Deep learning accelerators (DLAs) have been proved to be efficient computational devices for processing deep learning algorithms. Various DLA architectures are proposed and applied to different applications and tasks. However, for most DLAs, their programming interfaces are either difficult to use or not efficient enough. Most DLAs require programmers to directly write instructions, which is time-consuming and error-prone. Another prevailing programming interface for DLAs is high-performance libraries and deep learning frameworks, which are easy to be used and very friendly to users, but their high abstraction level limits their control capacity over the hardware resources thus compromises the efficiency of the accelerator. A design of the programming interface is for DLAs. First various existing DLAs and their programming methods are analyzed and a methodology for designing programming interface for DLAs is proposed, which is a high-level assembly language (called DLA-AL), assembler and runtime for DLAs. DLA-AL is composed of a low-level assembly language and a set of high-level blocks. It allows experienced experts to fully exploit the potential of DLAs and achieve near-optimal performance. Meanwhile, by using DLA-AL, end-users who have little knowledge of the hardware are able to develop deep learning algorithms on DLAs spending minimal programming efforts. |
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