| DENG Junyong(邓军勇)*,ZHANG Pan*,JIANG Lin**,XIE Xiaoyan***,DENG Jingwen*.[J].高技术通讯(英文),2024,30(2):128~137 |
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| Research and design of matrix operation accelerator based on reconfigurable array |
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| DOI：10. 3772 / j. issn. 1006-6748. 2024. 02. 003 |
| 中文关键词: |
| 英文关键词: matrix factorization (MF), recommender system (RS), array processor, reconfigurable,matrix multiplication |
| 基金项目: |
| Author Name | Affiliation | | DENG Junyong(邓军勇)* | ( * School of Electronic Engineering, Xi’an University of Posts and Telecommunications, Xi’an 710121, P. R. China)
( ** School of Computer Science and Technology, Xi’an University of Science and Technology, Xi’an 710054, P. R. China)
( *** School of Computer, Xi’an University of Posts and Telecommunications, Xi’an 710121, P. R. China) | | ZHANG Pan* | | | JIANG Lin** | | | XIE Xiaoyan*** | | | DENG Jingwen* | |
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| 中文摘要: |
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| 英文摘要: |
| In the case of massive data, matrix operations are very computationally intensive, and the memory
limitation in standalone mode leads to the system inefficiencies. At the same time, it is difficult
for matrix operations to achieve flexible switching between different requirements when implemented
in hardware. To address this problem, this paper proposes a matrix operation accelerator based on
reconfigurable arrays in the context of the application of recommender systems(RS). Based on the
reconfigurable array processor (APR-16) with reconfiguration, a parallelized design of matrix operations
on processing element (PE) array is realized with flexibility. The experimental results show
that, compared with the proposed central processing unit ( CPU) and graphics processing unit
(GPU) hybrid implementation matrix multiplication framework, the energy efficiency ratio of the accelerator
proposed in this paper is improved by about 35 × . Compared with blocked alternating least
squares (BALS), its the energy efficiency ratio has been accelerated by about 1 × , and the switching
of matrix factorization(MF) schemes suitable for different sparsity can be realized. |
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