FEI Yingying*(费莹莹),XIAO Chunlu*,JING Wenhao*,MA Tianming*,WANG Jiahan**,JIN Jie*.[J].高技术通讯(英文),2025,31(2):154~163 |
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Low power Viterbi decoder design for low altitude adhoc networks |
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DOI:10. 3772 / j. issn. 1006-6748. 2025. 02. 005 |
中文关键词: |
英文关键词: low altitude adhoc network, Manhattan distance, network protocol, Viterbi decoder, field programmable gate array (FPGA) |
基金项目: |
Author Name | Affiliation | FEI Yingying*(费莹莹) | (* School of Electrical and Electronic Engineering, Shanghai University of Engineering Science, Shanghai 201620, P. R. China)
(** School of Electronic Information Engineering, Dalian University of Technology, Dalian 116024, P. R. China) | XIAO Chunlu* | | JING Wenhao* | | MA Tianming* | | WANG Jiahan** | | JIN Jie* | |
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中文摘要: |
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英文摘要: |
With the rapid development of low altitude economic industry, low altitude adhoc network technology has been getting more and more intensive attention. In the adhoc network protocol designed in this paper, the convolutional code used is (3,1,7), and the design of a low power Viterbi decoder adapted to multi-rate variations is proposed. In the traditional Viterbi decoding method, the high complexity of path metric (PM) accumulation and Euclidean distance computation leads to the problems of low efficiency and large storage resources in the decoder. In this paper, an improved add compare select (ACS) algorithm, a generalized formula for branch metric (BM) based on Manhattan distance, and a method to reduce the accumulated PM for different Viterbi decoders are put forward. A simulation environment based on Vivado and Matlab to verify the accuracy and effectiveness of the proposed Viterbi decoder is also established. The experimental results show that the total power consumption is reduced by 15. 58% while the decoding accuracy of the Viterbi decoder is guaranteed, which meets the design requirements of a low power Viterbi decoder. |
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